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What are the uses of multibyte data organization in computer architecture?
There are two commonly used for organizations for multibyte data such as big-endian and little-endian. In the big-endian format, the most important byte of a value is saved in location X, the following byte in location X + 1, and so on. For example, the hexadecimal value 0102 0304H (H for hexadecimal) would be stored, starting in location 100H, as shown in table (a).
Data organization in (a) big endian and (b) little endian formats
| Memory Address | Data (in hex) |
|---|---|
| 101 | 01 |
| 102 | 02 |
| 103 | 03 |
| 104 | 04 |
(a)
| Memory Address | Data (in hex) |
|---|---|
| 101 | 04 |
| 102 | 03 |
| 103 | 02 |
| 104 | 01 |
(b)
In little endian, the order is reversed. The smallest significant byte is saved in location X, the next byte in location X+1, etc. The similar value in little endian format as displayed in the table (b).
The same organizations can be used for bits within a byte. In big-endian organizations, bit 0 is the right-most bit of a byte, the left-most bit is bit 7. In the little-endian organization, the left-most bit is bit 0, and bit 7 is the right-most bit.
Endian organization is used for bytes and words do not impact the performance of the CPU and computer system. As long as the CPU is designed to handle a specific format, neither is better than the other. The main problem comes in transferring data between computers with different endian organizations. For example, if a computer with a little-endian organization transfers the value 01020304H to a computer with a big-endian organization without converting the data, the big-endian computer will read the value as 04030201H.
Some programs can convert data files from one format to the other, and some microprocessors have special instructions to perform the conversion. There is another issue of concern for multibyte words is alignment. Modern microprocessors can read in more than one byte of data at a time. For example, the Motorola 68040 microprocessor can read in four bytes simultaneously.
However, the four bytes must be in consecutive locations that have the same address except for the two least significant bits. This CPU can read locations 100, 101, 102, and 103 simultaneously, but not locations 101,102,103, and 104. This case would require two read operations, one for locations 100 (not needed), 101, 102, and 103, and the other for 104, 105 (not needed), 106 (not needed), and 107 (not needed).
Alignment simply means storing multibyte values in locations such that they begin at a location that also begins a multibyte read block. In this example, this means beginning multibyte values at memory locations that have addresses evenly divisible by four, thus guaranteeing that a four-byte value can be accessed by a single read operation.
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