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What are different methods to implement rename buffers?
There are four different methods to implement rename buffers such as using a merged architectural and rename register file, employing a separate name register file, or holding renamed values either in the ROB or in DRIS.
In the first method, rename buffers are executed along with the architectural registers in a similar physical register file, known as the merged architectural and rename register file. The merged register file has to provide a large enough number of physical registers to implement both the architectural and rename registers. For instance, the Power1 provides 40 and the R10000 64 physical registers for renaming 32 FP architectural registers.
This scheme operates in the following way. Let us assume that at a given moment the architectural registers are associated with a particular set of physical registers. Now for each destination register specified in an instruction, a free physical register is allocated, if available.
In this way, the architectural registers are represented by a dynamically changing set of physical registers. For instance, let us assume that the rename process allocates to the destination register of the instruction
ad r2,………….
that is to r2, the physical register p3. An entry is then set up in the mapping table. The first part of the entry is the entry valid bit. If this bit indicates a valid entry the second part is interpreted as the rename buffer index (RB index), which points to the physical register used as a rename register. In this case that is p3.
After renaming we get −
ad p3,………….
Source operands are renamed simply by substituting the architectural register numbers with the physical register numbers found in the corresponding RB index fields.
ad……r0, r1
In this way, the renaming of the instruction ad r2, r0, r1 results in
ad r2, r0, r1
An additional scheme is required to reclaim physical registers no longer in use. In the method of a merged register file, reclaiming is a complex task.
When rename register values are held in a separate register file, this file is called the rename register file. The next possibility is to use the reorder buffer (ROB) to implement rename buffers. While using a ROB each issued instruction will be allocated a separate ROB entry. Thus, it is quite natural to store the generated (intermediate) result of that instruction in the same entry as well.
In the final method of implementation, the DRIS is used in the same manner as the ROB. The Lightening made use of this alternative. In all three cases, intermediate results are held in the respective rename buffer until their retirement.
During retirement, the content of the rename buffer (rename register entry, ROB entry, or DRIS entry) is written back into the architectural register file. In this way, the architectural register file is updated and the rename buffer is reclaimed for further use.
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