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Instruction type CMP R in 8085 Microprocessor
In 8085 Instruction set, CMP is a mnemonic that stands for “CoMPareAccumulator” and hereR stands for any of the following registers, or memory location M pointed by HL pair.
R = A, B, C, D, E, H, L, or M
This instruction is used to compare contents of the Accumulator with given register R. The result of compare operation will be stored in the Temp register. Temp is not a GPR (General Purpose Register) but an internal register that is not accessible to the programmer. Actually R register’s content will get subtracted from Accumulators content and difference value will be stored on the Temp register. As R can have any of the eight values, there are eight opcodes for this type of instruction. It occupies only 1-Byte in memory.
Mnemonics, Operand | Opcode(in HEX) | Bytes |
---|---|---|
CMP A | BF | 1 |
CMP B | B8 | 1 |
CMP C | B9 | 1 |
CMP D | BA | 1 |
CMP E | BB | 1 |
CMP H | BC | 1 |
CMP L | BD | 1 |
CMP M | BD | 1 |
Let us consider one sample instruction CMP E falling in this category.As It is a 1-Byte instruction so during execution of this instruction it will occupy only a single Byte in memory. The result of execution of this instruction has been depicted with following set of examples −
Example 1
Before | After | |
---|---|---|
(A) |
50H | 50H |
(E) |
70H | 70H |
(Temp) |
Any value | E0H |
(F) |
Any value | Cy=1,AC=0,S=1,P=0,Z=0 |
Example 2
Before | After | |
---|---|---|
(A) |
70H | 70H |
(E) |
50H | 50H |
(Temp) |
Any value | 20H |
(F) |
Any value | Cy=0,AC=0,S=0,P=0,Z=0 |
Example 3
Before | After | |
---|---|---|
(A) |
50H | 50H |
(E) |
50H | 50H |
(Temp) |
Any value | 00H |
(F) |
Any value | Cy=0,AC=0,S=0,P=1,Z=1 |
Address | Hex Codes | Mnemonic | Comment |
---|---|---|---|
2004 | BB | CMP E | Temp = Register A - Register E |
The timing diagram against this instruction CMP E execution is as follows −
![CMP E](https://www.tutorialspoint.com/assets/questions/media/14158/cmp_e.jpg)
Summary − So this instruction CMP E requires 1-Byte, 1-Machine Cycle (Opcode Fetch) and 4 T-States for execution as shown in the timing diagram.