In this type of network, connections among processors and memory modules are made using simple switches. There are three basic interconnection topologies such as crossbar, single-stage, and multistage.Crossbar NetworksA crossbar network defines the other extreme to the limited single bus network. While the single bus can provide only a single connection, the crossbar can provide simultaneous connections among all its inputs and all its outputs. The crossbar includes a switching element (SE) at the intersection of any two lines extended horizontally or vertically inside the switch.Single-Stage NetworksIn this case, a single stage of switching elements (SEs) exists between the inputs ... Read More

MIMD stands for Multiple-instruction multiple-data streams. It includes parallel architectures are made of multiple processors and multiple memory modules linked via some interconnection network. They fall into two broad types including shared memory or message passing.A shared memory system generally accomplishes interprocessor coordination through a global memory shared by all processors. These are frequently server systems that communicate through a bus and cache memory controller.The bus/ cache architecture alleviates the need for expensive multi-ported memories and interface circuitry as well as the need to adopt a message-passing paradigm when developing application software. Because access to shared memory is balanced, these ... Read More

SIMD represents single-instruction multiple-data streams. The SIMD model of parallel computing includes two parts such as a front-end computer of the usual von Neumann style, and a processor array as displayed in the figure.The processor array is a collection of identical synchronized processing elements adequate for simultaneously implementing the same operation on various data. Each processor in the array has a small amount of local memory where the distributed data resides while it is being processed in parallel.The processor array is linked to the memory bus of the front end so that the front end can randomly create the local ... Read More

The flow of vector operands between the main memory and vector registers is generally pipelined with various access paths. In this section, we specify vector operands and describe three vector-access schemes from interleaved memory modules allowing overlapped memory accesses.Vector Operand Specifications − Vector operands can have arbitrary lengths. Vector elements are not essentially saved in contiguous memory areas. For example, the entries in a matrix may be stored in row-major or in column-major. Each row, column, or diagonal of the matrix can be used as a vector.When row elements are stored in contiguous locations with a unit stride, the column ... Read More

A vector is a set of scalar data elements, all of similar type, saved in memory. The vector elements are ordered to have a permanent addressing increment between successive elements known as the stride.A vector processor is an ensemble of hardware resources, such as vector registers, functional pipelines, processing elements, and register counters, for executing vector operations.Vector processing appears when arithmetic or logical operations are used to vectors. It is distinguished from scalar processing which operates on one or one pair of data. The conversion from scalar code to vector code is known as vectorization.Types of Vector InstructionsThere are various ... Read More

Parallel algorithms are those specially devised for parallel computers. The idealized parallel algorithms are those written for the PRAM models if no physical constraints or communication overheads are imposed. In the real world, an algorithm is considered efficient only if it can be cost-effectively implemented on physical machines. In this sense, all machine-implementable algorithms must be architecture-dependent. This means the effects of communication overhead and architectural constraints cannot be ignored.Characteristics of Parallel AlgorithmThere are various characteristics of parallel algorithm which are as follows −Deterministic versus nondeterministic − It is only deterministic algorithms are implementable on real machines. Our study is ... Read More

A distributed-memory multicomputer system is modeled in the figure. The system includes multiple computers known as nodes, related by a message-passing network. Each node is an independent computer including a processor, local memory, and sometimes connected disks or I/O peripherals.The message-passing network supports point-to-point static connections among the nodes. All local memories are private and are applicable only by local processors. For this method, traditional multicomputer has been referred to as no-remote-memory-access (NORMA) machines.This condition will constantly be deleted in future multicomputer with distributed shared memories. Internode communication is carried out by passing messages through the static connection network.Multicomputer Generations ... Read More

VLIW stands for Very-Long Instruction Word (VLIW) architectures. It is an appropriate alternative for exploiting instruction-level parallelism (ILP) in programs, especially, for performing more than one basic (primitive) instruction at a time.These processors include various functional units, fetch from the instruction cache a Very-Long Instruction Word including various primitive instructions, and dispatch the whole VLIW for parallel implementation.These capacities are exploited by compilers that produce code that has grouped separate primitive instructions executable in parallel. The processors have associatively simple control logic because they do not implement any dynamic scheduling nor reordering of operations.The main goal of VLIW is to ... Read More

Data routing networks are used for inter PE data exchange. Data routing networks can be static or dynamic. In a multicomputer network, data routing is achieved by messages among multiple computer nodes.Routing network reduces the time required for data exchange and thus system performance is enhanced. Commonly used data routing functions are shifting, rotation, permutations, broadcast, multicast, personalized communication, shuffle, etc.There are various data routing functions which are as follows −Permutations − Let there are n objects, and then there are n permutations by which n objects can be recorded. The set of all permutations form a permutation group concerning ... Read More

The topology of an interconnection network can be static or dynamic. Static networks are created point-to-point direct connections which will not alter during implementation. Dynamic networks are applied with switched channels, which are dynamically constructed to connect the communication demand in user programs.Static Networks − Static networks are used for fixed connections amid subsystems of a centralized system or various computing nodes of a distributed system. Dynamic networks include buses, crossbar switches, multistage networks, which are provide used in shared-memory multiprocessors. Both types of networks have also been applying for inter PE data routing in SIMD computers.In general, a network ... Read More