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Found 312 Articles for Computer Architecture
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In the associative mapping function, any block of main memory can probably consist of any cache block position. It breaks the main memory address into two parts - the word ID and a tag as shown in the figure. To check for a block stored in the memory, the tag is pulled from the memory address and a search is performed through all of the lines of the cache to see if the block is present.This method of searching for a block within a cache appears like it might be a slow process, but it is not. Each line of ... Read More
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An associative memory can be treated as a memory unit whose saved information can be recognized for approach by the content of the information itself instead of by an address or memory location. Associative memory is also known as Content Addressable Memory (CAM).The block diagram of associative memory is shown in the figure. It includes a memory array and logic for m words with n bits per word. The argument register A and key register K each have n bits, one for each bit of a word.The match register M has m bits, one for each memory word. Each word ... Read More
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An Auxiliary memory is referred to as the lowest-cost, highest-space, and slowest-approach storage in a computer system. It is where programs and information are preserved for long-term storage or when not in direct use. The most typical auxiliary memory devices used in computer systems are magnetic disks and tapes.Magnetic DisksA magnetic disk is a round plate generated of metal or plastic coated with magnetized material. There are both sides of the disk are used and multiple disks can be stacked on one spindle with read/write heads accessible on each surface.All disks revolve together at high speed and are not stopped ... Read More
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The data or contents of the main memory that are used generally by the CPU are saved in the cache memory so that the processor can simply create that information in a shorter time. Whenever the CPU requires to create memory, it first tests the cache memory. If the data is not established in cache memory, so the CPU transfers into the main memory.Cache memory is located between the CPU and the main memory. The block diagram for a cache memory can be represented as −The concept of reducing the size of memory can be optimized by placing an even ... Read More
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The main memory is the fundamental storage unit in a computer system. It is associatively large and quick memory and saves programs and information during computer operations. The technology that makes the main memory work is based on semiconductor integrated circuits.RAM is the main memory. Integrated circuit Random Access Memory (RAM) chips are applicable in two possible operating modes are as follows −Static − It consists of internal flip-flops, which store the binary information. The stored data remains solid considering power is provided to the unit. The static RAM is simple to use and has smaller read and write cycles.Dynamic ... Read More
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The memory unit is an important component in any digital computer since it is required for saving programs and information. A very small computer with limited software can fulfill its intended function without the requirement for additional storage capacity.There is only not limited space in one memory unit to contain all the programs used in an ordinary computer. Further, various computer users acquire and continue to acquire huge amounts of data-processing software. It is not all acquired data that is required by the processor at an equal time. Hence, it is more cost-effective to use low-cost storage devices to distribute ... Read More
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DMA represents Direct Memory Access. It is a hardware-controlled data transfer technique. An external device is used to control data transfer. The external device generates address and control signals that are required to control data transfer. External devices also allow peripheral devices to directly access memory. The external device which controls the data transfer is called the DMA controller.DMA Idle CycleWhen the system is turned on, the switches are in position A. The processor starts implementing the program until it requires to read a block of information from the disk. The disk processor transfers a sequence of commands to the ... Read More
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An interrupt I/O is a process of data transfer in which an external device or a peripheral informs the CPU that it is ready for communication and requests the attention of the CPU.I/O ConfigurationThe terminals send and receive serial information. Each portion of serial data has eight bits of alphanumeric code, where the leftmost bit is continually 0. The serial data from the input register is transferred into the input register INPR. The output register OUTR can save the serial data for the printer. These two registers interact with the Accumulator (AC) in parallel and with a communication interface in ... Read More
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In multilevel interrupts, more than one interrupt pin is present in the processor. Hence, interrupts can be recognized by the CPU on getting an interrupt request from some of the interrupt pins.The figure shows the multilevel interrupt system.Let us now discuss the process flow of a multilevel interrupt. When the external asynchronous input is inserted, the logic control of a multilevel interrupt is as follows −The processor completes its current instruction.The current contents of the program counter are stored in the stack.The program counter is loaded with the address of an interrupt service routine.Program execution reaches with the instruction taken ... Read More
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In single level interrupts, many devices can interrupt the processor at the same time to attend to their requests. But all the devices raise requests through a single input pin of the CPU. When interrupted, the CPU must identify the device that raised the request. Once the I/O port is identified, the CPU attends to the request of I/O device and then continues to carry out the task that it was performing before being interrupted.In single-level interrupts, interrupt requests from all the devices are logically ORed and connected to the interrupt input of the processor. Hence, the interrupt request from ... Read More