In this program we will see how to subtract two 8-bit numbers using 8085 microprocessor.Problem StatementWrite 8085 Assembly language program to subtract two 8-bit numbers with or without borrow and store the result at locations 8050H and 8051H.DiscussionIn 8085, the SUB instruction is used 2’s complemented method for subtraction. When the first operand is larger, the result will be positive. It will not enable the carry flag after completing the subtraction. When the result is negative, then the result will be in 2’s complemented form and carry flag will be enabled.We are using two numbers at location 8000H and 8001H. ... Read More

Initially the processor programs 8257. Here the processor behaves as the master and 8257 here works in the slave mode. The channel of the program is obtained by writing to the Address Register from the starting address of memory for transferring Data, and writing to the Counter Register where the number of bytes to be transferred is by using the Direct Memory Access Scheme. The number of bytes of information which is specified by the Least Significant 14 bits. Whereas The Most Significant 2 bits indicate what type of data transfer is to occur. After that the processor writes to ... Read More

The 8257 pins are described is given in the table below.Fig. Physical pin diagram of Intel 8257Fig: Functional pin diagram of Intel 82578257 is using a power of 5V.D7-0/A15-8For communicating with the processor there are 8 bidirectional data pins, when the processor is in active and the 8257 s active state it is in slave mode. When the processor remains in the HOLD state and 8257 behaves as the master, they are used to send out the Most Significant 8 bits of memory address.A3-0When the processor remains in active state and are used as address input pins of 8257. Hence ... Read More

The status register is of length 8-bits wide. The processor can only read but not write and it is only selected when CS* is 0, A3-0 is 1000, and IOR* is 0.About the present state of 8257 the information about the status is provided. The five blocks are important others are marked 0 since they are not in use.UD1 = Update in progress0 = Update not in progressTCn1 = TC reached for Channel n (n = 0–3)0 = TC not yet reached for Channel nFig: Interpretation of the contents of the status registerThe read operation of the status register is ... Read More

The processor, in active state writes to the Control register of 8257 to configure its working purpose. To find out the status of 8257, the processor reads status register of the processor. The control register is of length 8-bits which is only read by the processor but not read. It is only selected when CS* is 0, A3-0 is 1000, and IOW* is 0.Intel calls the control register 8257 normally the mode set register by as it sets the mode of operation of 8257.AULD1 = Enable auto load0 = Disable auto loadTCS1 = Stop DMA transfer if TC reached0 = ... Read More

We have four Counters, ranging from CR3-0, which consists of 16 bits each. At the time when the CR becomes access to the processor which is 16-bits wide, the Least Significant and the Most Significant Byte of the register are accessed in an alternate manner, which starts with the Least Significant Byte. Also, the M/L* flip-flop helps here. The information about the number of bytes which are to be transferred using DMA are contained in the Counter Registers, which is decremented by 1 for every byte in the DMA data transfer. When the Counter Register becomes 0, the last DMA ... Read More

Every DMA channel consists an address register and a count register. These registers are 16-bits wide in length. In each 16 bits there are four ARs marked as AR3-0. Apart from four CRs there are control and status registers also. They are separate 8-bit registers, but have the same address. Here the processor can only write in the control register but we can read in the status register. Fig. Programmer's view at a glance of Intel 8257.We can select any one of the above registers by the address of the four pins marked as A3-0 of 8257. The processor used here writes to ... Read More

We know from the study of the description of 8257 that it consists of 40 pins and the condition when it works in Slave Mode and Master mode. From the microprocessor point of view, the I/O port is a chip which is used exclusively for DMA control application and is not used for interfacing I/O devices for the purpose of data transfer with the processor. This chip is only used to control the DMA data transfer for four I/O ports. For every I/O port there exists a corresponding DMA channel. This chip provides all the features which are needed for ... Read More

As per DIP package Intel 8257 DMA controller chip is a 40-pin programmable Integrated Circuit. The pin diagrams of physical and functional are indicated below. The DMA controller chip 8257 works in two modes namely slave mode and master mode. Likely the processor also works in two modes namely active mode and HOLD mode. The processor normally works in active mode where the processor works as the master of the computer system. The processor goes to the HOLD state only when DMA transfer is required and it gives control to the system bus.When the processor is programming 8257 it is ... Read More

The microcomputer system basically consists of three blocksThe microprocessorThe memories of microprocessor like EPROM and RAM andThe I/O ports by which they are connected.The possible data transfers are indicated below.Between the memory and microprocessor data transfer occurs by using the LDA and STA instructions.Between microprocessor and I/O ports also data transfer occurs by the help of two instructions IN and OUT.Through DMA data transfer, data is transferred between the Input Output ports and the memory.If the data transfer which is used for reading from the memory location is 3456H and then writing to output port number is 50H which takes ... Read More