Found 690 Articles for Computer Science

Evolution of ILP Processors in Computer Architecture

Ginni
Updated on 20-Jul-2021 07:09:25

424 Views

The evolution of Von Neumann processors can be attributed to two areas of development improvement in technology, marked by increasing clock rates and the functional evolution of processors. Functional evolution has been achieved primarily by increasing the degree of parallelism of the internal operations, the issues, and the execution of instructions.This occurred in three consecutive evolution phases as the first phase is represented by traditional von Neumann processors, which are characterized by sequential issues and sequential execution of instructions as shown in the figure.The search for greater implementation gave advance to the introduction of parallel instruction execution. Parallel execution was ... Read More

What are different methods of parallelism in Parallel Computer Architecture?

Ginni
Updated on 20-Jul-2021 07:08:07

2K+ Views

There are two methods of exploiting parallelism in parallel computer architecture are as follows −PipeliningIn pipelining, several functional units are working in sequence to implement a single computation. These functional units form an assembly line or pipeline. Each functional unit describes a specific phase of the computation and each computation goes through the entire pipeline.If there is only a single computation to be executed, the pipeline cannot extract any parallelism. But, when the same computation is to be implemented multiple times, these computations can be overlapped through the functional units.Assume that the pipeline consists of N functional units (stages) and ... Read More

What is Flynn’s Taxonomy in Computer Architecture?

Ginni
Updated on 20-Jul-2021 07:07:11

9K+ Views

Flynn’s classic taxonomy (Flynn, 1966) depends on the number of control units and the multiple processors available in a computer. Flynn’s introduced the following notions −Single Instruction StreamSingle Instruction stream means that architecture has a single control unit generating a single stream of instruction abbreviated as single instruction SI.Multiple Instruction StreamMultiple Instruction Stream means that architecture has multiple control units each producing has a distinct stream of instruction abbreviated as MI.Single Data StreamA single data stream is a single processor available which will execute a single stream of data abbreviates as SD.Multiple Data StreamIn multiple data streams, there are multiple ... Read More

What are the types of Parallelism in Computer Architecture?

Ginni
Updated on 20-Jul-2021 07:04:12

3K+ Views

There are various types of Parallelism in Computer Architecture which are as follows −Available and Utilized ParallelismParallelism is the most important topics in computing. Architectures, compilers, and operating frameworks have been striving for more than two decades to extract and use as much parallelism as available to speed up computation.Available and Utilized ParallelismParallelism is the most important topics in computing. Architectures, compilers, and operating frameworks have been striving for more than two decades to extract and use as much parallelism as available to speed up computation.Functional Parallelism is that type of parallelism that raise from the logic of a problem ... Read More

What is the difference between Concurrency and Parallel Execution in Computer Architecture?

Ginni
Updated on 20-Jul-2021 07:00:42

587 Views

Concurrency ExecutionIt is the sensual behavior of the N-Client I-Server model where one client is served at any provided moment. This model has dual characteristics. It is sequential on a small time scale, but together on a rather large time scale.In this method, the elementary problem is how the competing clients, processors or threads, must be scheduled for service (Execution) through the single-level (processor). Scheduling policies can be oriented toward efficient service in terms of highest throughput (least intervention) or towards short average response time, and so on.The scheduling policy can be considered as covering two methods as first deals ... Read More

What are different levels of abstraction in Computer Architecture?

Ginni
Updated on 20-Jul-2021 06:58:02

4K+ Views

There are three different layers of abstraction in computer system such as the concrete architecture at the system level, the abstract and concrete architecture at the processor level, and the abstract and concrete architecture at the micro-machine level. Let us discuss each level one by one.Concrete Architecture of Computer SystemsAt the system level, the representation of the concrete architecture depends on processor level building blocks, including processors, memories, buses, etc. Its representation contains the description of the building blocks, the interpretation among them, and the services of the entire system. The figure shows an example of the system-level architecture of ... Read More

Prove that Linear bounded automata LBA ⊂ PSPACE in TOC?

Bhanu Priya
Updated on 16-Jun-2021 14:17:21

273 Views

Linear Bounded Automaton (LBA) is a restricted form of Turing Machine in which input tape is finite.ExampleProve that LBA ⊂ PSPACEPSPACE is a superset of the set of context-sensitive languages.Now to prove LBA=PSPACE, We use theorem of Space compression with tape reduction which states that, For every k-tape S(n) space-bounded off-line Turing Machine M and constant c>0, there exists a one-tape cS(n) space-bounded off-line turing machine N such that L(M)=L(N).Following identity holds for −DSPACE(S(n))=DSPACE(O(S(n)))and NSPACE(S(n))=NSPACE(O(S(n)))Since LBA is one-tape n space-bounded Turing Machine it follows −LBA=NSPACE(n)---------------------(1)Now by Savitch theorem, if S is fully space constructible and S(n)>log(n) thenNSPACE(S(n)) ⊆DSPACE(S^{2}(n)) -------------(2)Final proofLBA=NSPACE(n)............by(1)⊆DSPACE(n^{2})............by(2)⊂DSPACE(n^{3})............by ... Read More

Construct a PDA that accepts (a,b)* language but not contain bbbb?

Bhanu Priya
Updated on 16-Jun-2021 14:16:09

472 Views

Push down Automata (PDA) is complement of the PDA that contain Substring bbbStepsMake the PDA for accepting those strings that have conation bbb.Complement it by making non-accepting as accepting and vice versa.Construct PDAYou can construct the PDA as shown below for the (a, b)* languageThe nature of transition format is Input, Top of stack, PUSH/POPExamplea ,a , aa means on i/p a and top of stack is a then push aAt q0 i, e initial if a or b anything came move state to q1Till q1 we get 1 b to make substring b_ _ so now on q1 if ... Read More

Distinguish between non-deterministic, deterministic and Turing Machine computational models?

Bhanu Priya
Updated on 16-Jun-2021 14:12:35

1K+ Views

Let us begin by understanding the concept of deterministic finite automata (DFA) in the theory of computation (TOC).Deterministic Finite Automaton (DFA)In DFA, for each info image, one can decide the state to which the machine will move. Henceforth, it is called Deterministic Automaton.Formal Definition − A Deterministic Finite automata is a 5-tuplesM=(Q, ∑, δ, q0, F)Where, Q − Finite set called states.∑ − Finite set called alphabets.δ − Q × ∑ → Q is the transition function.q0 ∈ − Q is the start or initial state.F − final or accept state.Non-deterministic finite automata (NDFA)In NDFA, for a specific info image, ... Read More

Construct a TM that accepts even-length palindromes over the alphabet {0,1}?

Bhanu Priya
Updated on 16-Jun-2021 14:07:16

8K+ Views

A Turing machine (TM) is a 7-tuple (Q, ∑, Γ, δ, q0, qaccept , qreject).Where, Q is a finite set of states.∑ is the input alphabet that does not contain the blank symbol t.Γ is the tape alphabet, where t ∈ Γ and ∑ ⊆ Γ.δ: (Q × Γ) → (Q × Γ × {L, R}) is the transition function.q0 ∈ Q is the start state.qaccept ∈ Q is the accept state.qreject ∈ Q is the reject state, where qreject ≠ qaccept.For accepting even-length palindrome over the alphabet {0, 1}, follow the steps given below −Match the first and last ... Read More

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