Sequential consistency of instruction execution associates with two techniques such as first to the order in which instructions are finished and second to the order in which memory is created because of the load and store instruction or memory references of other instructions as shown in the figure.The term processor consistency indicates the consistency of instruction completion with sequential instruction execution. Superscalar processors preserve either a weak or strong consistency.A weak processor consistency means that instructions can complete out-of-order, provides that no data dependencies are satisfied. In this case, instructions may be reordered by the processor only if no dependencies ... Read More

The design space of register renaming resembles that of shelving. As shown in the figure, it consists of the following main components such as the scope of register renaming, the layout of rename buffers, the operand fetch policy, and the number of renames per cycle.Scope of Register RenamingMost first-generation superscalar processors, like the PA 7100, Supersparc, α21064, R8000, Pentium, and others did not employ renaming. In partial renaming, it is restricted to a particular instruction type or a few types. Examples are the Power1 (RS6000), Power2, and Nx586.Layout of the rename buffersThe layout of the rename buffers creates the real ... Read More

When instructions are executed in parallel, they will be completed in out-of-program order. Here, it does not matter whether instructions are issued or dispatched in order or out-of-order, or whether shelving is used or not. The point is that unequal execution times force instructions to finish out-of-order, even if they are issued (and dispatched) in order. Then short, ‘younger’ instruction can be completed previous than long, ‘older’ ones. Thus, superscalar instructions give rise to an out-of-order finishing of instructions.Here, it can make a distinction between the terms ‘to finish’, ‘to complete’, and ‘to retire’ an instruction. The term ‘to finish’ ... Read More

There are four different methods to implement rename buffers such as using a merged architectural and rename register file, employing a separate name register file, or holding renamed values either in the ROB or in DRIS.In the first method, rename buffers are executed along with the architectural registers in a similar physical register file, known as the merged architectural and rename register file. The merged register file has to provide a large enough number of physical registers to implement both the architectural and rename registers. For instance, the Power1 provides 40 and the R10000 64 physical registers for renaming 32 ... Read More

The layout of the rename buffers establishes the actual framework for renaming. There are three basic components are the type and the number of the rename buffers and the basic mechanism which is used for accessing rename buffers as displayed in the figure.Type of rename buffersThe chosen type of rename buffers has the largest impact on renaming. It is definitive for the basic approach of the implementation and thus it determines where the intermediate results of the instruction are to be written into or read form. It can be designated as intermediate results which have already been generated but are ... Read More

Register renaming is a standard approach for eliminating false data dependencies, such as WAR and WAW dependencies, between register data. It was first suggested by Tjaden and Flynn in 1970.They intended to use register renaming for a definite set of instructions that compare more or less to the class of load instructions, although it does not use the phrase ‘renaming’. Keller (1975) introduced the designation ‘register renaming’ and interpreted it for all suitable instructions.Register Renaming presumes the three-operand instruction format. To illustrate this precondition, let us consider a two-operand instruction, sayad r1, r2with the interpretationr1←(r1)+(r2) In the two instruction format, ... Read More

Flip flops are an application of logic gates. A flip-flop circuit can stay in a binary state continually (as long as power is transferred to the circuit) before conducted by an input signal to switch states. S-R flip-flop represents SET-RESET flip-flops. The SET-RESET flip-flop includes two NOR gates and also two NAND gates. These flip-flops are also known as S-R Latch.The SR flip-flop has two inputs such as the ‘Set’ input and a ‘Reset’ input. The two outputs of SR flip-flop are the main output Q and its complement $\overline{Q}$.The diagram shows the circuit diagram of an SR flip-flop.The truth ... Read More

A latch is a device with particularly two stable states and these states are high-output and low-output. A latch has a feedback direction, to maintain the data. Latches can be memory devices and can save one bit of information. It is used to “latch onto” data and save it in the required area. One of the most generally used latches is the SR latch.SR LatchAn SR latch is an asynchronous device. An SR latch does not rely upon control signals but relies only on the state of the S and R inputs. An SR latch can be generated by interlinking ... Read More

A logic gate is an electronic device that creates logical decisions depends on the various combinations of digital signals accessible on its inputs. A digital logic gate can have greater than one input signal but has only one digital output signal. There are seven basic logic gates such as AND, OR, XOR, NOT, NAND, NOR, and XNOR.AND GateIt is a digital logic gate. It has an output that is frequently at logic level “0” and goes “HIGH” to a logic level “1” when all of its inputs are at logic level “1”. The output of AND gate returns “LOW” when ... Read More

Digital data is described, saved, and communicated as sets of binary digits which are known as bits. The set of bits is called binary code. Binary codes are used in devices as they enable computers to implement complex evaluations fastly and effectively.Classification of Binary CodesBinary codes can be defined as numbers and letters of the alphabet and some special characters and control services such as numeric or alphanumeric codes. Numeric codes can define numbers, whereas alphanumeric codes can define alphabetic letters and numerals. The binary codes are classified as demonstrated in the diagram.Numeric CodesNumeric codes can define numbers. There are ... Read More