Computer Network Articles - Page 120 of 131

Stop – and – Wait protocol is data link layer protocol for transmission of frames over noiseless channels. It provides unidirectional data transmission with flow control facilities but without error control facilities.This protocol takes into account the fact that the receiver has a finite processing speed. If data frames arrive at the receiver’s end at a rate which is greater than its rate of processing, frames be dropped out. In order to avoid this, the receiver sends an acknowledgement for each frame upon its arrival. The sender sends the next frame only when it has received a positive acknowledgement from ... Read More

The Simplex protocol is data link layer protocol for transmission of frames over computer network. It is hypothetical protocol designed for unidirectional data transmission over an ideal channel, i.e. a channel through which transmission can never go wrong.It is assumed that both the sender and the receiver are always ready for data processing and both of them have infinite buffer. The sender simply sends all its data available onto the channel as soon as they are available its buffer. The receiver is assumed to process all incoming data instantly. It is does not handle flow control or error control. Since ... Read More

Data Link Layer FrameA frame is a unit of communication in the data link layer. Data link layer takes the packets from the Network Layer and encapsulates them into frames. If the frame size becomes too large, then the packet may be divided into small sized frames. At receiver’ end, data link layer picks up signals from hardware and assembles them into frames.Fields of a Data Link Layer FrameA data link layer frame has the following parts:Frame Header: It contains the source and the destination addresses of the frame and the control bytes.Payload field: It contains the message to be ... Read More

Data Link Layer FrameA frame is a unit of communication in the data link layer. Data link layer takes the packets from the Network Layer and encapsulates them into frames. If the frame size becomes too large, then the packet may be divided into small sized frames. At receiver’ end, data link layer picks up signals from hardware and reassembles them into frames.Frame Structure and Frame HeaderA frame is composed of four types of fields, namely kind, seq, 𝑎𝑐𝑘 and info. The first three fields contain control information about the frame and collectively form the frame header. Besides, the frame ... Read More

Network acceleration is a set of techniques used to increase the speed of information flow between the end users for imparting better network experience. It is also known as WAN optimization or WAN acceleration.Techniques involved in Network AccelerationTraffic Shaping: Priority is assigned to network traffic on whose basis bandwidth is allocated.Data Deduplication and Data Caching: Duplicate data is cached and references of them are sent for additional requests of the same data. This reduces the data volume for remote backups, replication, and disaster recovery.Compression: The size of data is reduced to lower bandwidth usage.Choice of Protocols: High performance protocols are ... Read More

A wide area network accelerator (WAN accelerator) is a hardware component, a software, or an appliance executing in a virtualized environment that provides caching and optimization of WAN services. A WAN accelerator is also called a WAN optimizer or application accelerator.Working PrincipleA WAN accelerator provides services to speed up information flow between the end users for imparting better network experience. Its target is to reduce the data volume to be transmitted. So, it compresses data and uses data deduplication techniques. The accelerator caches duplicate data and sends references of them when they are needed multiple times instead of resending the ... Read More

Cyclic Redundancy Check (CRC)Cyclic Redundancy Check (CRC) is a block code that was invented by W. Wesley Peterson in 1961. It is commonly used to detect accidental changes to data transmitted via telecommunications networks and storage devices.CRC involves binary division of the data bits being sent by a predetermined divisor agreed upon by the communicating system. The divisor is generated using polynomials. So, CRC is also called polynomial code checksum.Before sending the message over network channels, the sender encodes the message using CRC. The receiver decodes the incoming message to detect error. If the message is error-free, then it is ... Read More

A polynomial code is a linear code having a set of valid code words that comprises of polynomials divisible by a shorter fixed polynomial is known as generator polynomial.They are used for error detection and correction during the transmission of data as well as storage of data.Types of Polynomial CodesThe types of polynomial codes are:Cyclic Redundancy CodeBose–Chaudhuri–Hocquenghem (BCH) CodesReed–Solomon CodesRepresentation of Bit Strings with PolynomialsThe code words, which are essentially bit strings, are represented by polynomials whose coefficients are either 0 or 1. A 𝑘 – bit word is represented by a polynomial ranging from 𝑥0 to 𝑥𝑘−1. The order ... Read More

Fletcher checksum is an error – detection technique that uses two checksums to determine single-bit errors in a message transmitted over network channels. It is a block code technique that was devised by John G. Fletcher in 1970s at Lawrence Livermore Labs, USA.The checksums are created based on the data values in the data blocks to be transmitted and appended to the data. When the receiver gets this data, the checksums are re-calculated and compared with the existing checksums. A non-match indicates an error.The error-detection capabilities of this method is nearly same as that of Cyclic Redundancy Check (CRC) but ... Read More

Quantum figuring contemplates hypothetical calculation frameworks (quantum PCs) that make coordinate utilization of quantum-mechanical marvels, for example, superposition to perform operations on data. Quantum PCs are unique in relation to binary digital PCs in light of transistors.While regular advanced registering requires that the information is encoded into twofold digits (bits), each of which is dependable in one of two distinct states (0 or 1), quantum calculation utilizes quantum bits, which can be in superpositions of states. A Quantum Turing Machine is a hypothetical model of such a PC and is otherwise called the general quantum PC.What are they?Starting at 2017, ... Read More