Now let us see a program of Intel 8085 Microprocessor. This program is mainly for finding a square of a number.Problem StatementWrite 8085 Assembly language program to find the square of a number using Look-Up Table. DiscussionIn this example, we are using Look-Up table to find the square of a number. The main limitation of this program is that it can find a square in range 0-F. When the input is above F, it will fail. We are storing the square result into the memory. When the number is greater than F, we are storing FFH into memory to indicate an ... Read More

Now let us see a program of Intel 8085 Microprocessor. This program will convert HEX to ASCII values.Problem StatementWrite 8085 Assembly language programs to convert Hexadecimal characters to ASCII values.DiscussionWe know that the ASCII of number 00H is 30H (48D), and ASCII of 09H is39H (57D). So all other numbers are in the range 30H to 39H. The ASCII value of 0AH is 41H (65D) and ASCII of 0FH is 46H (70D), so all other alphabets (B, C, D, E, F) are in the range 41H to 46H.Here we are providing hexadecimal digit at memory location 8000H, The ASCII equivalent ... Read More

Now let us see a program of Intel 8085 Microprocessor. This program will convert ASCII to HEXvalues.Problem StatementWrite 8085 Assembly language program to convert ASCII to Hexadecimal character values. DiscussionWe know that the ASCII of number 00H is 30H (48D), and ASCII of 09H is39H (57D). So all other numbers are in the range 30H to 39H. The ASCII value of 0AH is 41H (65D) and ASCII of 0FH is 46H (70D), so all other alphabets (B, C, D, E, F) are in the range 41H to 46H.Here the logic is simple. We are checking whether the ASCII value is less ... Read More

We have assumed that the processor that the processor used in this microcomputer system is 8085, and the slave which is connected to the input IR4 of Master 8259. The address of the port of 8259 is dependent on the chip and the circuit used. Using ICWs and OCWs the Master 8259 and Slave 8259 have to be programmed individually. But the interesting thing is that the two ICWs, ICW1 and ICW2 have the same meaning distinguishingly Master or Slave. So the discussion about the two ICWs, ICW1, and ICW2 is of no use. So we have not done any ... Read More

Now in this topic we assume that 8085 is the processor which is used in this microcomputer system. In this slave, no 8259 slaves are used. We should examine properly before 8259 PIC is used in the microcomputer system for performing the interrupt control application. 8259 is configured in such a fantastic way that is found that a variety of information are provided like for IR0 request IV, interrupts like level or edge-triggered, whether 8259s are used single or many, if ICW4 is in need or not and whether for the interrupt requests masking should be done or not. This ... Read More

It is also an 8-bit register. The processor here writes to SLR but cannot read. The content of this register here implies a different meaning for Master8259 and Slave 8259. Through Master 8259 information is carried through the IR inputs to which Slave 8259s are connected. If the SLR of Master 8259 is loaded with the value 00001111, then it signifies that:The Slave exists on 8259 namely called as IR0, IR1, IR2 and IR3.No Slave exists on 8259 on this registers IR4, IR5, IR6 and IR7.A Slave 8259 serves information about the IR input of Master 8259 to which the ... Read More

Also, an 8-bit register which keeps track records of the interrupt requests that are currently being executed. If the request IR6 is currently being served, whose contents of ISR will be 01000000. If by any means the request to IR3 becomes active during the service process of IR6, 8259 sets bit 3 of ISR to 1 and activates the output INT. But bit 6 of ISR always remains set at 1 asIR6 request which is not fully serviced. Hence the contents ofISR become 01001000. The following assumptions stated below helps this to happen.Until 8259 operates in a complete nested mode, without ... Read More

It stores the levels of interrupts to be masked by means of storing the bits of the interrupt level already masked. It differs from other registers by means of only masking of the bits. Other processes remained intact. Let’s take for the assumption that the requests to the IR4 AND IR6 should not be an interrupt to the processor which can be well achieved by setting the bits of IMR to 1. The IMR is written by OCW1 command. The processor here also has the capability to read the contents of the IMRregister. To complete this task, the processor has ... Read More

An 8-bit register in which the tracks of active interrupt requests are kept. Whenever activation of an interrupt request input is done the bit corresponding in IRR register is set to 1. For example, if we activate the IR4 and IR6 inputs bits no 4 and 6 of IRR are set to 1 by making the contents of IRR as 01010000. But the processor is designed only to read the contents of this register but cannot write it to IRR. To read the IRR contents, the processor only has an issue the OCW3 command to the 8259 along with the LS 3 ... Read More

The 8259 is a specialized I/O port chip. It is never used in the interfacing of I/O devices but is only used for controlling the interrupts in a microcomputer.8259 consists of A0 as the only address input pin. Hence for a microprocessor, only two addresses are possible for the 8259 ports. The two ports can be termed as low port and high port.The processor selects the low port when A0 = 0The processor selects the high port when A0 = 1The processor issues some words termed as command words to these ports so as to configure the 8259 better. There are ... Read More